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DRAM Protocol Analyzer
JLA520A DDR6/LPDDR6 Protocol Analyzer
The JKI DRAM protocol analyzer system is the industry’s highest-performance DDR6/LPDDR6 protocol analyzer with deep acquisition memory depth up to 1TB and the highest sampling rate up to 64GHz. Our high-speed and powerful memory trace solutions enable you to debug and validate DDR-based memory systems up to 8 Gb/s
JLA520A DDR6/LPDDR6 Protocol Analyzer

Coming Soon
Scheduled for release in November 2026
Key Features
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Large Memory for Data Capturing
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Large memory depth up to 1 TB allows you to debug very complex problems by long capture times.
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Ultra-fast Sampling Speed
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Ultra-fast sampling speed up to 64 GHz allows you to capture data rates up to 8 Gb/s for all channels without any extra options.
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Probe Solution
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To minimize signal degradation in the probe system, the analog module is separated from the digital module and placed as close as possible to the device.
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Interposer Solution
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We provide a variety of interposers and connecting solutions: LPDDR6 interposers
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Product Table
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Specification
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Maximum Sample Rate
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Max. 32 GHz (2/4/8/16/32/64 GHz options)
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Number of Channels: total 32 CH
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Per-pin termination level
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Per-pin threshold level
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Per-pin timing delay
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Analysis mode
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Timing mode / Eye mode
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Acquisition Memory
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Max. 1 TB (standard GB)
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Full memory depth up to 64 GHz
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Hardware data compression
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Hysteresis settings for all channels
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Host Interface: PCIe Gen5 x8
Document
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JLA420A DDR5/LPDDR5 Protocol Analyzer
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JLA520A DDR6/LPDDR6 Protocol Analyzer
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